B. Sklenard, P. Batude, Q. Rafhay, I. Martin-Bragado, C. Xu, B. Previtali, B. Colombeau, F-A Khaja, S. Cristoloveanu, P. Rivallin, C. Tavernier, T. Poiroux. Influence of device architecture on junction leakage in low-temperature process FDSOI MOSFETs. Solid-State Electronics 88, 9–14, 2013. DOI: 10.1016/j.sse.2013.04.018
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